In the field of this invention it is known that IQ modulation may be performed by using finite impulse response filters (FIR's) operating at an oversampling ratio (of the sampling rate of the I and Q samples) with coefficients equal in number to the product of the oversampling ratio and the span length times of the I and Q samples.
It is desirable to provide a low cost and programmable modulator to handle particularly the following different operating modes (MA's):                EDGE in DCR (Direct Conversion Receiver) or DVLIF (Digital Very-Low Intermediate Frequency) modes with high oversampling clocks        IDEN and IS136 in interpolation modes with high oversampling clocks        IS95 in DCR mode with high oversampling clocks        
In order to meet the requirements of low cost and programmability, such a modulator should have:                low integrated circuit (IC) gate count;        high oversampling ratio (e.g., greater than 4);        reduced sets of coefficients for software transmitter (TX) handover between MA's without IC re-programming.        low power consumption        
However, such combined requirements have been difficult to meet.
A need therefore exists for an IQ modulator and method wherein the abovementioned disadvantage(s) may be alleviated.